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- [4] Copper Electrodeposition Parameters Optimization for Through-Silicon Vias Filling PROCESSING, MATERIALS, AND INTEGRATION OF DAMASCENE AND 3D INTERCONNECTS, 2010, 25 (38): : 109 - 118
- [5] Electrochemical simulation of electrodeposition growth of copper in Through Silicon Via(TSV) 2023 24TH INTERNATIONAL CONFERENCE ON ELECTRONIC PACKAGING TECHNOLOGY, ICEPT, 2023,
- [6] Copper-selective electrochemical filling of macropore arrays for through-silicon via applications NANOSCALE RESEARCH LETTERS, 2012, 7
- [7] Copper-selective electrochemical filling of macropore arrays for through-silicon via applications Nanoscale Research Letters, 7
- [8] Thermomechanical Characteristics of Copper Through-Silicon via Structures IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2015, 5 (02): : 225 - 231