共 29 条
- [21] Auditory model based 2.4kbps speech CODEC and its real-time implementation using single TMS320C5410 DSP chip [J]. 8TH INTERNATIONAL CONFERENCE ON NEURAL INFORMATION PROCESSING, VOLS 1-3, PROCEEDING, 2001, : 1471 - 1476
- [22] A Real-Time Heartbeat Detection Technique Using TMS320C6713 Processor and Multi-rate Signal Processing [J]. 2016 3RD INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN INFORMATION TECHNOLOGY (RAIT), 2016, : 149 - 153
- [23] Research on control law accelerator of digital signal process chip TMS320F28035 for real-time data acquisition and processing [J]. 2ND ANNUAL INTERNATIONAL CONFERENCE ON INFORMATION SYSTEM AND ARTIFICIAL INTELLIGENCE (ISAI2017), 2017, 887
- [24] GOP LEVEL PARALLELISM IMPLEMENTATION FOR REAL-TIME H264/AVC VIDEO ENCODER ON MULTICORE DSP TMS320C6472 [J]. 2014 6TH EUROPEAN EMBEDDED DESIGN IN EDUCATION AND RESEARCH CONFERENCE (EDERC), 2014, : 152 - 156
- [25] A generic methodology for the software managing of caches in multi-processors DSP architectures - Application to the real-time implementation of low level image processing on the TMS320C80 [J]. ICASSP '99: 1999 IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS, SPEECH, AND SIGNAL PROCESSING, PROCEEDINGS VOLS I-VI, 1999, : 1905 - 1908
- [27] A real-time MIDI music synthesis system using sinusoidal modeling on a TI TMS320C32 digital signal processor [J]. 1997 IEEE FIRST WORKSHOP ON MULTIMEDIA SIGNAL PROCESSING, 1997, : 469 - 474
- [28] Real-time implementation of QCELP vocoder for speech and data in CDMA cellular system using TMS320C50 fixed point DSP chip [J]. WIRELESS PERSONAL COMMUNICATIONS: ADVANCES IN COVERAGE AND CAPACITY, 1997, : 57 - 62
- [29] A software engineering methodology to optimize caching in multi-processor DSP architectures: TMS320C80 results towards the real-time execution of low level image processing [J]. ASSET'99: 1999 IEEE SYMPOSIUM ON APPLICATION-SPECIFIC SYSTEMS AND SOFTWARE ENGINEERING & TECHNOLOGY - PROCEEDINGS, 1999, : 146 - 154