A High Performance Multi-standard Viterbi Decoder

Convolutional encoder is widely applied in lots of wireless communication standards including 3G/4G mobile communications, DVB (Digital Video Broadcasting), IoT(Internet of Things) transmissions and so on. Therefore multi-standard Viterbi decoder design for the above receivers is a hot issue. In this paper, a reconfigurable high performance Viterbi decoder design is proposed for LTE, WiMAX, CDMA2000, GSM and TD-SCDMA. The proposed flexible architecture supports polynomial reconfiguration, constraint length of 5 similar to 9, and code rate of 1/2, 1/3, 1/4. Moreover, both tail-biting and zero trellis terminating modes are supported. To reduce decoding latency and complexity, it employs the forward traceback method and sliding window pipeline technology. Simulation results show that its maximum decoding throughput is 1.15Gbps under a clock frequency of 600MHz. Finally, its area is about 0.2mm(2), and the power consumption is about 46 mw, which is estimated with Synopsis DC and TSMC 28nm standard cell library.