Nano - Microscale Electrical Characterization of Copper Thru Silicon Vias in 3D Stacked Integrated Circuits

被引：0
|
作者：
Allal, Djamel [1 ]
Delvallee, Alexandra [1 ]
Moran, Jose [1 ]
Khan, Mohammad Saif [1 ]
Piquemal, Francois [1 ]
机构：
[1] Lab Natl Metrol & Essais LNE, 29 Ave Roger Hennequin, F-78197 Trappes, France
来源：
2018 CONFERENCE ON PRECISION ELECTROMAGNETIC MEASUREMENTS (CPEM 2018) | 2018年
关键词：
thru silicon via; 3D integrated circuits; nanoscale electrical measurement; scanning microwave microscope; microscale four-probe setup; atomic force microscope;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper describes the implementation of different electrical measurements techniques and systems operating at nano and micro scales for the electrical characterization of copper filled Thru Silicon Vias used for 3D integrated circuits interconnects and defect detection in such vias.
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页数：2
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