Variability-aware TCAD Based Design-Technology Co-Optimization Platform for 7nm Node Nanowire and Beyond

被引：0

作者：

Wang, Y. ^{[1
]}

Cheng, B. ^{[2
]}

Wang, X. ^{[3
]}

Towie, E. ^{[2
]}

Riddet, C. ^{[2
]}

Brown, A. R. ^{[2
]}

Amoroso, S. M. ^{[2
]}

Wang, L. ^{[3
]}

Reid, D. ^{[2
]}

Liu, X. ^{[1
]}

Kang, J. ^{[1
]}

Asenov, A. ^{[2
,3
]}

机构：

[1] Peking Univ, Inst Microelect, Beijing, Peoples R China

[2] Gold Stand Simulat Ltd, Glasgow G3 7JT, Lanark, Scotland

[3] Univ Glasgow, Sch Engn, Glasgow G12 8QQ, Lanark, Scotland

来源：

2016 IEEE SYMPOSIUM ON VLSI TECHNOLOGY | 2016年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this work, a design-technology co-optimization (DTCO) platform for 7nm node nanowire and beyond is demonstrated for the first time. The platform extends from predictive TCAD simulations through compact model extraction to circuit simulation. The impact of different cross-section geometries, design of experiment, parasitic effects, global variation and local variation are accurately and efficiently examined to provide insights for variability-aware device/circuit co-optimization.

引用

页数：2

共 34 条

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