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- [21] A quad 3.125Gbps transceiver cell with all-digital data recovery circuits 2005 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2005, : 384 - 387
- [25] A Baseband All-Digital Clock and Data Recovery Circuit with A Limited Range Binary Search FSM 2020 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS - TAIWAN (ICCE-TAIWAN), 2020,
- [26] A 1 Gbps UWB OOK Receiver with Double PLL All-Digital CDR and Data Packet Re-Synchronizer 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
- [27] A 1.25Gbps All-Digital Clock and Data Recovery Circuit with Binary Frequency Acquisition 2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 2008, : 680 - +
- [29] A Fast-Locking All-Digital Clock and Data Recovery Circuit Using Successive Approximation 2016 IEEE 59TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2016, : 81 - 84
- [30] All-digital reconfigurable IR-UWB pulse generator using BPSK modulation in 130nm RF-CMOS process 2017 IEEE 8TH LATIN AMERICAN SYMPOSIUM ON CIRCUITS & SYSTEMS (LASCAS), 2017,