Circuit Design for Carbon Nanotube Field Effect Transistors

被引：0

作者：

Nan, Haiqing ^{[1
]}

Wang, Wei ^{[2
]}

Choi, Ken ^{[2
]}

机构：

[1] Intel Mobile Commun, Log & Phys Synth Dept, Neubiberg, Germany

[2] IIT, Elect & Comp Engn, Chicago, IL 60616 USA

来源：

2012 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC) | 2012年

关键词：

Low power design; Digital Circuits; Carbon nanotube FET;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Carbon nanotube field-effect transistors (CNFETs) and more recently graphene FETs are currently being researched as a replacement of CMOS in the near future due to their physical characteristics such as achievable current density, high speed, high-K compatibility, chemical stability, and low short channel effects. Historically, we have seen many cases that new devices disappeared because of the lack of design methodology for large scale integration (LSI). In this tutorial paper, we introduce circuit integration schemes by using CNFETs for future LSI design.

引用

页码：351 / 354

页数：4

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