High performance chip to substrate interconnects utilizing embedded structure

被引:0
|
作者
Juhola, T [1 ]
Kerzar, B [1 ]
Mokhtari, M [1 ]
Eastman, LF [1 ]
机构
[1] Royal Inst Technol, Dept Elect, Lab Photon & Microwave Engn, SE-16440 Kista, Sweden
关键词
D O I
10.1109/ECTC.1999.776166
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A high performance packaging approach for state-of-the-art high frequency ICs has been adopted by creating fully planar Au-Cu-Au carrier-interconnect surfaces for the embedded chip(s) on low dielectric constant i.e. low k substrates using innovative wafer processing techniques. A mixture of coplanar and microstrip solution for interconnects has been introduced and modified e-gun, sputtering and liftoff steps used to create high quality surfaces in order to lower the losses for high speed, high frequency ICs for communication systems. A number of ICs fabricated in different technologies may be embedded in a MCM- module with interconnect design rules similar to that of IC-technologies using the techniques introduced in this paper.
引用
收藏
页码:167 / 173
页数:7
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