Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions

被引：5
|
作者：
Lee, Ko-Hui [1 ,2 ]
Lin, Horng-Chih [1 ,2 ,3 ]
Huang, Tiao-Yuan [1 ,2 ]
机构：
[1] Natl Chiao Tung Univ, Dept Elect Engn, Hsinchu 300, Taiwan
[2] Natl Chiao Tung Univ, Inst Elect, Hsinchu 300, Taiwan
[3] Natl Nano Device Labs, Hsinchu 300, Taiwan
来源：
IEEE ELECTRON DEVICE LETTERS | 2013年 / 34卷 / 06期
关键词：
Nanowire; polycrystalline-silicon (poly-Si); self-aligned; short channel; THIN-FILM-TRANSISTOR; DEVICES;
D O I：
10.1109/LED.2013.2256771
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A high-performance short-channel tri-gated polycrystalline-silicon nanowire (NW) field-effect transistor is developed by using simple sidewall spacer and lateral etching techniques without employing costly lithographic tools. Channel length of 120 nm and NW thickness of 25 nm can be easily formed by the self-aligned process. The device exhibits superior electrical characteristics because of the strong gate controllability: a subthreshold swing of 102 mV/dec, drain induced barrier lowing of 74.4 mV/V, and extremely high I-ON/I-OFF ratio of 4.4 x 10(8)(V-d = 1 V) are obtained.
引用
收藏
页码：720 / 722
页数：3
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