Fatigue crack propagation analysis for micro solder joints with void

被引：0
|
作者：
Terasaki, Takeshi [1 ]
Tanie, Hisashi [1 ]
机构：
[1] Hitachi Ltd, Mech Engn Res Lab, Hitachi, Ibaraki 3120034, Japan
来源：
EMAP 2005: INTERNATIONAL SYMPOSIUM ON ELECTRONICS MATERIALS AND PACKAGING | 2005年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Voids in a solder joint can reduce their fatigue life. Voids are caused by the presence of flux in solder paste during reflow soldering, and they are difficult to remove completely. From numerical analysis, we aimed to obtain criteria for evaluating the effect of voids on fatigue life in a solder joint. We investigated crack propagation in the micro-solder joints of a semiconductor and developed a new crack propagation model. In our model, the fatigue life of a solder joint is evaluated based on damage that is accumulated during crack propagation, and crack paths are automatically calculated. The crack-propagation behavior of a center-cracked-plate (CCP) specimen calculated using the new model agreed well with that obtained from measurement. Using our model, we analyzed the effect of positions and sizes of voids on crack paths and the fatigue life of a ball grid array (BGA) structure. The crack paths and the fatigue life were both found to strongly depend on the positions and sizes of voids. We have achieved a reliable method of evaluating the effects of voids in a solder joint.
引用
收藏
页码：37 / 42
页数：6
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