Silicon evaluation of logic proximity bridge patterns

被引：4
|
作者：
Tran, Eric N.
Kasulasrinivas, Vishwashanth
Chakravarty, Sreejit
机构：
来源：
24TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS | 2006年
关键词：
D O I：
10.1109/VTS.2006.82
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
Logic Proximity Bridge (LPB) patterns were proposed as an alternative to realistic-bridge and n-detect patterns based on simulation studies. Here, silicon evaluation of logic proximity bridge patterns, on a mobile chipset product, is presented. Results show these patterns to significantly increase the class scan fallout above and beyond stuck-at patterns, consisting of single load and multi-load patterns, with very high stuck-at fault coverage. In addition it points to the usefulness of generating ATPG patterns using multiple fault models, LPB faults being one of them.
引用
收藏
页码：78 / 83
页数：6
相关论文
共 50 条
  • [41] Beyond grouping by proximity in regular dot patterns
    Strother, L
    Kubovy, M
    PERCEPTION, 2004, 33 : 33 - 33
  • [42] The Logic of Policy Change after Crisis: Proximity and Subsystem Interaction
    Nohrstedt, Daniel
    Weible, Christopher M.
    RISK HAZARDS & CRISIS IN PUBLIC POLICY, 2010, 1 (02): : 1 - 32
  • [43] A smart DNA tweezer for universal proximity assay and logic building
    Jin, Yifan
    Wang, Jingyi
    Wu, Yuanyu
    Fu, Xinrui
    Li, Wei
    SENSORS AND ACTUATORS B-CHEMICAL, 2019, 298
  • [44] Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits
    Tenace, Valerio
    Calimera, Andrea
    Macii, Enrico
    Poncino, Massimo
    VLSI-SOC: SYSTEM-ON-CHIP IN THE NANOSCALE ERA - DESIGN, VERIFICATION AND RELIABILITY, 2017, 508 : 60 - 82
  • [45] EVALUATION OF STRESS INTENSITY FACTOR OF SILICON-NITRIDE WITH BRIDGE INDENTATION CRACK BY CAUSTIC METHOD
    OGASAWARA, T
    AKIBA, T
    OTANI, K
    AKIMUNE, Y
    SHIMIZU, K
    NIPPON SERAMIKKUSU KYOKAI GAKUJUTSU RONBUNSHI-JOURNAL OF THE CERAMIC SOCIETY OF JAPAN, 1992, 100 (08): : 1007 - 1010
  • [46] Bridge Clustering for Systematic Recognition of Damage Patterns on Bridge Elements
    Chang, Kowoon
    Chi, Seokho
    JOURNAL OF COMPUTING IN CIVIL ENGINEERING, 2019, 33 (05)
  • [47] Experimental Evaluation of a Low-Cost QFN Silicon Carbide Half-Bridge Module
    Arnold, Martin
    Laird, Ian D.
    Longford, Andy
    Yuan, Xibo
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2019, 9 (08): : 1603 - 1612
  • [48] Live Demo: Silicon Evaluation of Multimode Dual Mode Logic for PVT-Aware Datapaths
    Stanger, Inbal
    Shavit, Netanel
    Taco, Ramiro
    Lanuzza, Marco
    Fish, Alexander
    2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
  • [49] Dual Nanowire Silicon MOSFET With Silicon Bridge and TaN Gate
    Theng, A. L.
    Goh, W. L.
    Lo, G. Q.
    Chan, L.
    Ng, C. M.
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2008, 7 (06) : 795 - 799
  • [50] SILICON COMPILERS BRIDGE GAP BETWEEN CONCEPTS AND SILICON.
    Goering, Richard
    Electronic Systems Technology and Design/Computer Design's, 1987, 26 (20): : 67 - 80
12345