A high speed analog 50 Omega line driver in digital CMOS technology

A single-ended analog buffer designed to drive 50 Omega loads is described. The circuit consists of a common source output pair driven by a pair of differential error amplifiers which significantly reduce the output impedance. This technique improves the drive capability of operational amplifiers. This paper demonstrates the feasibility of using the circuit technique as a stand alone buffer. The amplifier has been fabricated in a 2 mu m digital CMOS technology and occupies an area of 190 mil(2). The amplifier has a similar to 50 Omega output impedance and an upper half power frequency of 23MHz when driving a 50 Omega/50pF load and consumes 102mW from +/-5V supplies.