A high-speed analog comparator in 0.5μ CMOS technology

被引：0
|
作者：
Mahdy, A. [1 ]
Rassoul, R. A. [1 ]
Hamdy, N. [1 ]
机构：
[1] AAST, Dept Elect & Commun, Alexandria, Egypt
来源：
PROCEEDINGS OF THE 25TH NATIONAL RADIO SCIENCE CONFERENCE: NRSC 2008 | 2008年
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D O I：
暂无
中图分类号：
TN [电子技术、通信技术];
学科分类号：
0809 ;
摘要：
This paper describes a design of a high-speed analog comparator that is realized in 0.5-um CMOS technology, A response time of 1.62 ns was recorded at an average power consumption of 0.58 mW and a supply voltage of 3 V. The comparator has been employed in the realization of an 8-bit flash type ADC where a maximum sampling rate of 300Mb/s was reached.
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收藏
页码：U683 / U689
页数：7
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