An Asymmetric Multilevel Inverter Using Reduced Switch Count Topology

被引：0

作者：

Mufeeda, M. ^{[1
]}

Krishnan, Geethu K. ^{[1
]}

机构：

[1] MEA Engn Coll, Dept Elect & Elect Engn, Perinthalmanna, Malappuram, India

来源：

2016 INTERNATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS, AND OPTIMIZATION TECHNIQUES (ICEEOT) | 2016年

关键词：

asymmetric cascaded multilevel inverter; harmonics; switching devices; low frequency control; high frequency control; total harmonic distortion; CONVERTERS; NUMBER;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A basic unit configuration which uses very less number of switches for obtaining an asymmetric multilevel inverter is proposed in this paper. Even and odd voltage levels at the output can be achieved by adding a conventional inverter bridge circuit to basic unit. Asymmetric configurations have different value of dc sources, so large number of levels will obtained at the output with reduced number of semiconductor devices, which make control easier with high power quality and lower harmonics. MATLAB Simulink model of a 11-level inverter with fundamental and high frequency control are performed and compared the results and harmonic spectra.

引用

页码：3129 / 3133

页数：5

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