A Comparative study of Junctionless dual material double gate Silicon on Insulator (SOI) and Silicon on Nothing (SON) MOSFET

被引:0
|
作者
Chauhan, Rachana [1 ]
Abhinav [1 ]
Kumar, Amrish [1 ]
Rai, Sanjeev [1 ]
机构
[1] Motilal Nehru Natl Inst Technol Allahabad, Dept Elect & Commun Engn, Allahabad 211004, Uttar Pradesh, India
来源
2017 4TH INTERNATIONAL CONFERENCE ON POWER, CONTROL & EMBEDDED SYSTEMS (ICPCES) | 2017年
关键词
JLDMDG MOSFET; SOI; SON; SCEs; DIBL and subthreshold swing;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this paper, the electrostatic performance of junctionless dual material double gate (JLDMDG) silicon on insulator (SOI) is compared with that of JLDMDG silicon on nothing (SON) MOSFET. The 2D device simulation is used for the comparison of major electrostatic figure of merits such as threshold voltage subthreshold swing, Drain Induced Barrier Lowering (DIBL) and Ion/Ioff ratio. Further, in this paper the effect of scaling and doping concentration on electrostatic performance of JLDMDG MOSFET has been studied by varying the gate oxide thickness, channel length and channel thickness. The simulation result reveals that the JLDMDG SON MOSFET provides higher immunity to different short channel effects, compared to JLDMDG SOI MOSFET. The degradation in SCEs in JLDMDG SOI is mainly due to the fringing field effect developed from gate to source/drain.The fringing field will further generate electric field into the channel region from source/drain which weaken the gate control.[9]
引用
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页数:6
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