Impact of gate overlap and underlap on analog/RF and linearity performance of dual-material gate-oxide-stack double-gate TFET

The work presented here, investigates the effect of overlap and underlap extensively on dual-material gate-oxide-stack double-gate tunnel field effect transistor (DMGOSDG-TFET) for the first time. To observe the influence of overlap and underlap on the device performance, DC parameters and analog/RF parameters such as: transfer characteristics, parasitic capacitances, transconductance (g(m)), cutoff frequency (f(T)), Gain Bandwidth Product (GBP) for DMGOSDG-TFET with overlap and underlap have been inspected and analyzed in contrast with the conventional device dual-material double-gate tunnel field effect transistor (DMDG-TFET) with similar dimension. Along with this, the impact of overlap and underlap on linearity parameters such as Input Intercept Point (IIP3), Intermodulation Point (IMD3) and Voltage Intercept Point (VIP3) have been also investigated and contrasted with the conventional DMDG-TFET. The impact of positive and negative trap charges has also been carried out in this work for the I-Ds - V-Gs characteristics of devices. Along with this, the gate leakage has also been studied. The TCAD simulation results prove that DMGOSDG-TFET is a better candidate where DC, analog/RF and linearity performance would be of great importance under overlap and underlap conditions. The simulation results also demonstrate that gate to source overlap and underlap, improves the device performance and makes the device more reliable for analog/RF applications. However, increasing the overlapping beyond 5nm does not bring any further enhancement in the device performance.