共 50 条
- [1] Clock distribution architectures: A comparative study ISQED 2006: Proceedings of the 7th International Symposium on Quality Electronic Design, 2006, : 85 - 91
- [2] Reference-based Clock distribution architectures IEEE MWSCAS'06: PROCEEDINGS OF THE 2006 49TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, 2006, : 704 - +
- [3] Testing Clock Distribution Networks 2017 IEEE 26TH ASIAN TEST SYMPOSIUM (ATS), 2017, : 158 - 163
- [4] REVIEW OF CLOCK DISTRIBUTION NETWORKS PROCEEDINGS OF 2015 ONLINE INTERNATIONAL CONFERENCE ON GREEN ENGINEERING AND TECHNOLOGIES (IC-GET), 2015,
- [5] Gossip algorithm with nonuniform clock distribution: Optimization over classical and quantum networks OPTIMAL CONTROL APPLICATIONS & METHODS, 2020, 41 (02): : 616 - 639
- [6] Low Power Clock Gates Optimization For Clock Tree Distribution PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010), 2010, : 488 - 492
- [7] TOLERANCE MECHANISMS IN CLOCK DISTRIBUTION NETWORKS HEWLETT-PACKARD JOURNAL, 1994, 45 (06): : 70 - 71
- [8] High performance clock distribution networks JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 1997, 16 (2-3): : 113 - 116
- [9] Analysis of jitter in clock distribution networks 2004 IEEE WORKSHOP ON MICROELECTRONIC AND ELECTRON DEVICES, 2004, : 45 - 47
- [10] High Performance Clock Distribution Networks Journal of VLSI signal processing systems for signal, image and video technology, 1997, 16 : 113 - 116