A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing

被引:0
|
作者
Guerrieri, Andrea [1 ]
Kashani-Akhavan, Sahand [1 ]
Lombardi, Pasquale [2 ]
Belhadj, Bilel [2 ]
Ienne, Paolo [1 ]
机构
[1] Ecole Polytech Fed Lausanne, Architecture Lab, Lausanne, Switzerland
[2] Syderal SA, Gals, Switzerland
关键词
SoC; FPGA; COTS; dynamic partial reconfiguration; software thread; hardware accelerator;
D O I
暂无
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
FPGAs (Field Programmable Gate Array) are an attractive technology for high-speed data processing in space missions due to their unbeatable flexibility and best performance-to-power ratio in comparison to software. However FPGAs suffer from 3 major drawbacks: (1) higher programming effort is required with respect to software; (2) hardware resources need to be allocated for each implemented function in contrast to software functions which can be executed on the same processing hardware; and (3) FPGAs are required to adopt radiation hardening techniques when deployed in a space environment. This paper presents a reconfigurable platform that demonstrates how modern FPGAs can be considered as computing resources like any other, suitable for emerging spatial applications and not subjected to the above-mentioned drawbacks. In particular, we show that large FPGAs can be split in different regions containing concurrently-running accelerators which can support the execution of a single or multiple applications. Then, in the same way as software-based multiprogrammed and multithreaded systems can dynamically create, schedule and execute threads, FPGA-based accelerators can be swapped in and out according to scheduling needs by exploiting their dynamic partial reconfiguration capability. A proof of concept cloud detection algorithm for Sentinel-2 multispectral images has been implemented and tested on our platform to validate the system's design principles and performance.
引用
收藏
页码:74 / 81
页数:8
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