High performance 70nm Gate Length Germanium-On-Insulator pMOSFET With High- /Metal Gate

被引：18

作者：

Romanjek, K. ^{[1
]}

Hutin, L. ^{[1
]}

Le Royer, C. ^{[1
]}

Pouydebasque, A. ^{[1
]}

Jaud, M. -A. ^{[1
]}

Tabone, C. ^{[1
]}

Augendre, E. ^{[1
]}

Sanchez, L. ^{[1
]}

Hartmann, J. -M. ^{[1
]}

Grampeix, H. ^{[1
]}

Mazzocchi, V. ^{[1
]}

Soliveres, S. ^{[1
]}

Truche, R. ^{[1
]}

Clavelier, L. ^{[1
]}

Scheiblin, P. ^{[1
]}

Garros, X. ^{[1
]}

Reimbold, G. ^{[1
]}

Vinet, M. ^{[1
]}

Boulanger, F. ^{[1
]}

Deleonibus, S. ^{[1
]}

机构：

[1] CEA, LETI, MINATEC, F-38054 Grenoble 9, France

来源：

ESSDERC 2008: PROCEEDINGS OF THE 38TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE | 2008年

关键词：

D O I：

10.1109/ESSDERC.2008.4681702

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We demonstrate for the first time 70nm gate length TiN/HfO(2) pMOSFETs on 200mm GeOI wafers, with excellent performances: I(ON)=330 mu A/mu m & I(OFF)=1 mu A/mu m @ V(d)=1.2V (without germanide). These performances are obtained using adapted counterdoping and pocket implants. We report the best CV/I vs. I(OFF) trade-off for Ge or GeOI: CV/I=4.4ps, I(OFF)=00nA/mu m @ V(d)=-1V. Moreover, based on fine electrical characterizations (mu, D(it), R(access)...) at T=77-300K, in-depth analysis of both ON & OFF states were carried out. Besides, calibrated TCAD simulations were performed to predict the performance enhancements which can be theoretically reached after further device optimization. By using germanide and reducing both interface state density and diode leakage we expect I(ON)=450 mu A/mu m, I(OFF)=100nA/mu m @ V(d)=-1V for L(g)=70nm.

引用

页码：75 / 78

页数：4

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