共 50 条
- [31] Technologies for 3D Wafer Level Heterogeneous Integration [J]. DTIP 2008: SYMPOSIUM ON DESIGN, TEST, INTEGRATION AND PACKAGING OF MEMS/MOEMS, 2008, : 123 - +
- [32] Wafer and Die Bonding Technologies for 3D Integration [J]. MATERIALS AND TECHNOLOGIES FOR 3-D INTEGRATION, 2009, 1112 : 55 - 65
- [33] CNT-BCB Composites as a Bonding Interface Material for 3D Integration [J]. 2011 IEEE ELECTRICAL DESIGN OF ADVANCED PACKAGING AND SYSTEMS SYMPOSIUM (EDAPS), 2011,
- [34] Miniaturized 3D Functional Interposer Using Bumpless Chip-on-Wafer (COW Integration with Capacitors [J]. IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), 2021, : 185 - 190
- [35] Antenna on Chip Design Utilizing 3D Integration for Mixed Signal Applications [J]. 2017 IEEE 60TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2017, : 209 - 212
- [36] Solving The Yield Optimization Problem for Wafer to Wafer 3d Integration Process [J]. WORLD CONFERENCE ON TECHNOLOGY, INNOVATION AND ENTREPRENEURSHIP, 2015, : 1905 - 1914
- [37] Robust Measurement of Bonding Strength for Wafer-to-Wafer 3D Integration [J]. 2023 International Conference on Electronics Packaging, ICEP 2023, 2023, : 105 - 106
- [40] Low Temperature Wafer Bonding for Wafer-Level 3D Integration [J]. 2014 4TH IEEE INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2014, : 9 - 9