Hardware reduction in digital MASH delta-sigma modulators via error masking

被引：0
|
作者：
Ye, Zhipeng [1 ]
Kennedy, Michael Peter [1 ]
机构：
[1] Natl Univ Ireland Univ Coll Cork, Dept Microelect Engn, Cork, Ireland
来源：
PRIME: 2008 PHD RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PROCEEDINGS | 2008年
基金：
爱尔兰科学基金会;
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A reduced complexity (RC) digital Multi-stAge noise SHaping (MASH) delta-sigma modulator (DSM) was proposed in [1]. The sequence length is maximized by setting the LSB of the input to "1"; a long word is used for the first modulator in a MASH structure; shorter words are used in subsequent stages. Rules for selecting the wordlengths of each stage are presented in this paper. We show that an appropriate selection of the wordlength for each stage of the DSM can yield similar performance compared with a conventional MASH DSM, but with less hardware and lower power consumption.
引用
收藏
页码：241 / 244
页数：4
相关论文
共 50 条
  • [41] Statistical error shaping for mismatch cancellation in complex bandpass delta-sigma modulators
    Riches, J
    Erdol, N
    Alhalabi, B
    2000 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 2000, : 771 - 780
  • [42] Spur-Free MASH Delta-Sigma Modulation
    Song, Jinook
    Park, In-Cheol
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2010, 57 (09) : 2426 - 2437
  • [43] Passive quantisation error extraction in continuous-time delta-sigma modulators
    Han, C.
    Maghari, N.
    ELECTRONICS LETTERS, 2016, 52 (11) : 917 - 918
  • [44] A low power MASH digital delta-sigma modulator with accurate output average value
    Mohammadi, Ismail
    Sobhi, Jafar
    Khiavi, Abdolhamid Moallemi
    Koozehkanani, Ziaddin Daie
    MICROELECTRONICS JOURNAL, 2022, 121
  • [45] A Novel Architecture of Pseudorandom Dithered MASH Digital Delta-Sigma Modulator with Lower Spur
    Noori, Seyed Ali Sadat
    Frashidi, Ebrahim
    Sadughi, Sirus
    JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2016, 25 (07)
  • [46] LSB dithering in MASH delta-sigma D/A converters
    Pamarti, Sudhakar
    Galton, Ian
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2007, 54 (04) : 779 - 790
  • [47] An efficient behavioral model for delta-sigma modulators
    Wu, JY
    Bibyk, SB
    PROCEEDINGS OF THE 44TH IEEE 2001 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2001, : 227 - 230
  • [48] AN ANALYSIS OF NONLINEAR BEHAVIOR IN DELTA-SIGMA MODULATORS
    ARDALAN, SH
    PAULOS, JJ
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS, 1987, 34 (06): : 593 - 603
  • [49] Delta-Sigma Modulators for Modular Multilevel Converters
    Jiang, Hao
    Venkataramanan, Giri
    2017 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2017, : 1473 - 1478
  • [50] Millimeter-Wave Delta-Sigma Modulators
    Hart, Adam
    Chalvatzis, Theodoros
    Garcia, Patrice
    Voinigescu, Sorin P.
    2008 IEEE CSIC SYMPOSIUM, 2008, : 154 - +
12345