A 22-bit 110ps Time-Interpolated Time-to-Digital Converter

被引:0
|
作者
Guo, Jian [1 ]
Sonkusale, Sameer [1 ]
机构
[1] Tufts Univ, Dept Elect & Comp Engn, Medford, MA 02155 USA
关键词
CMOS TIME;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a 22-bit time-interpolated Time-to-Digital Converter (TDC) with 110ps temporal resolution for biochemical sensing applications, which utilize time-resolve luminescence imaging technique. The TDC achieves wide dynamic range operation by incorporating a hybrid architecture that combines a 14-bit digital counter based coarse TDC and an 8-bit Voltage-Controlled Delay Line (VCDL) based fine TDC. We have proposed and implemented a novel readout algorithm for VCDL operation that achieves high throughput temporal measurement. A prototype chip has been fabricated in a 65nm standard CMOS process and it consumes 2.4mA power from a 1.2V supply. The measurement results on the fabricated TDC demonstrates a Differential Nonlinearity (DNL) of 0.49LSB and an Integral Nonlinearity (INL) or 1.67LSB (1LSB=110ps). The implemented TDC architecture and its fast readout circuit can be readily used in a variety of time-resolved biomedical sensing or high-speed imaging applications that require both wide dynamic range performance and high frame rate implementations.
引用
收藏
页数:4
相关论文
共 50 条
  • [21] A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER
    Wang, Zixuan
    Huang, Cheng
    Wu, Jianhui
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (07)
  • [22] An interpolating time-to-digital converter on an FPGA
    Chulkov, V. A.
    Medvedev, A. V.
    [J]. INSTRUMENTS AND EXPERIMENTAL TECHNIQUES, 2009, 52 (06) : 788 - 792
  • [23] CMOS time-to-digital converter without delay time
    Choi, JH
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2002, E85C (05) : 1216 - 1218
  • [24] A Pipeline Time-to-Digital Converter with a Programmable Time Amplifier
    Wang, Zixuan
    Xu, Hao
    Ding, Hao
    Xia, Xiaojuan
    Ji, Xincun
    Hu, Shanwen
    Guo, Yufeng
    Wang, Rong
    He, Haihang
    [J]. 2018 IEEE SYMPOSIUM ON COMPUTER APPLICATIONS & INDUSTRIAL ELECTRONICS (ISCAIE 2018), 2018, : 372 - 375
  • [25] An interpolating time-to-digital converter on an FPGA
    V. A. Chulkov
    A. V. Medvedev
    [J]. Instruments and Experimental Techniques, 2009, 52 : 788 - 792
  • [26] A Time-to-Digital Converter with Small Circuitry
    Shimizu, Kazuya
    Kaneta, Masato
    Lin, HaiJun
    Kobayashi, Haruo
    Takai, Nobukazu
    Hotta, Masao
    [J]. PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009, 2009, : 109 - +
  • [27] A 0.357 ps Resolution, 2.4 GHz Time-to-Digital Converter with Phase-Interpolator and Time Amplifier
    Kim, YoungHwa
    Park, AnSoo
    Park, Joon-Sung
    Pu, YoungGun
    Park, Hyung-Gu
    Kim, HongJin
    Lee, Kang-Yoon
    [J]. IEICE TRANSACTIONS ON ELECTRONICS, 2011, E94C (12) : 1896 - 1901
  • [28] Multi-Channel FPGA Time-to-Digital Converter With 10 ps Bin and 40 ps FWHM
    Portaluppi, Davide
    Pasquinelli, Klaus
    Cusini, Iris
    Zappa, Franco
    [J]. IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, 2022, 71
  • [29] A 400 MHz, 8-bit, 1.75-ps Resolution Pipelined-Two-Step Time-to-Digital Converter with Dynamic Time Amplification
    Tu, Yuting
    Xu, Rongjin
    Ye, Dawei
    Lyu, Liangjian
    Shi, C-J Richard
    [J]. 2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2020,
  • [30] A 9 bit, 1.12 ps Resolution 2.5 b/Stage Pipelined Time-to-Digital Converter in 65 nm CMOS Using Time-Register
    Kim, KwangSeok
    Yu, WonSik
    Cho, SeongHwan
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2014, 49 (04) : 1007 - 1016