Minimal Test Set Generation for Input Stuck-at and Bridging Faults in Reversible Circuits

Research in reversible computing has gained importance because of its potential use in low-power design, and also quantum computing. Several works on reversible circuit testing have also been reported. Many fault models have been proposed, some of which have been borrowed from traditional logic. In this paper, we consider the problem of reversible circuit testing, specifically targeting test generation for stuck-at and bridging fault models. It has been shown that inverted right perpendicularlog(2) Ninverted left perpendicular number of test vectors are necessary and sufficient for detection of all inputs bridging faults of a reversible circuit with N inputs. Addition of only one more test vector to an existing test set of single input bridging faults can also detect all single input stuck-at faults. Finally, we provide our experimental results to verify our claim, and also show that the test size is smaller as compared to existing methods.