A CMOS Track-and-Hold Circuit with beyond 30 GHz Input Bandwith

被引：0

作者：

Sedighi, Behnam ^{[1
]}

Huynh, Anh T. ^{[1
]}

Skafidas, Efstratios ^{[1
]}

机构：

[1] Univ Melbourne, Natl ICT Australia, Dept Elect & Elect Engn, Melbourne, Vic 3010, Australia

来源：

2012 19th IEEE International Conference on Electronics, Circuits and Systems (ICECS) | 2012年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

To realize future ultra high-speed data converters, sampling circuits with very large bandwidth are required. This paper studies the design of ultra high-speed Track-and-Hold (T/H) circuits. A bootstrapping circuit for T/H is presented. The proposed T/H is simulated in 32 nm SOI-CMOS technology. It achieves an input bandwidth higher than 30 GHz and provides an SNDR higher than 43.8 dB (ENOB > 7.0 b) when sampling a 34 GHz input signal at 10 GS/s.

引用

页码：113 / 116

页数：4

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