A high-speed BiCMOS switched-current track-and-hold circuit

被引：1

作者：

Reimann, T ^{[1
]}

Krummenacher, F ^{[1
]}

Declercq, M ^{[1
]}

机构：

[1] Swiss Fed Inst Technol, EPFL, Elect Lab, LEG Ecublens, CH-1015 Lausanne, Switzerland

来源：

IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS | 1998年

关键词：

D O I：

10.1109/CICC.1998.695003

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A fully differential switched-current mode twice interleaved track-and-hold circuit has been integrated in a 0.8 mu m f(T) 12 GHz BiCMOS technology. Used as a single channel T&H circuit (not interleaved), measurements have shown a THD of -58 dB (9,3 bits) for a sampling frequency of 100 MHz under Nyquist condition. Furthermore, in the same operation mode, the circuit is also able to sample a 20 MHz FS input signal at 200 MHz while keeping a THD of -65 dB, The switched-current memory cell consumes 41mW (excluding input and output stages) at 5 V. Operation in a twice interleaved mode is also presented.

引用

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页码：377 / 380

页数：4

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