Exploiting behavioral information in gate-level ATPG

被引:0
|
作者
Chiusano, S [1 ]
Corno, F [1 ]
Prinetto, P [1 ]
机构
[1] Politecn Torino, Dipartimento Automat & Informat, Turin, Italy
关键词
high level synthesis; high level test; software testing; genetic algorithms; simulated annealing;
D O I
10.1023/A:1008322011010
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper aims at broadening the scope of hierarchical ATPG to the behavioral-level. The main problem is identified, namely the mismatch of timing models between the behavioral- and gate-levels. As a main contribution of this paper, a theoretical analysis of this problem led to the definition of a novel concept, that of dominated patterns, that captures the needed link between the levels. Some metrics are defined, taken from the software realm, that allow generation of test patterns at the behavioral-level. To validate the concept correctness, different ATPG systems are presented, and experimental results show an improvement in the test quality, thanks to the exploitation of behavioral-level information.
引用
收藏
页码:141 / 148
页数:8
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