DNW-Controllable Triggered Voltage of the Integrated Diode Triggered SCR (IDT-SCR) ESD Protection Device

被引：0
|
作者：
Lai, Da-Wei [1 ]
Tseng, Wei-Jhih [1 ]
de Raad, Gijs [1 ]
Smedes, Theo [1 ]
机构：
[1] NXP Semicond, Gerstweg 2, NL-6534 AE Nijmegen, Netherlands
来源：
2017 39TH ELECTRICAL OVERSTRESS/ELECTROSTATIC DISCHARGE SYMPOSIUM (EOS/ESD) | 2017年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
A novel Integrated Diode Triggered SCR (IDT-SCR), with low capacitance (<200fF), and a controllable V-T1 is proposed for 1.8V application. The triggering is determined by the DNW biasing plus one integrated diode. The fail-current density is 16 times higher, and leakage 20 times lower, compared to a traditional capacitive-triggered bigFET.
引用
下载
收藏
页数：9
相关论文
共 50 条
  • [41] Diode-Triggered Silicon-Controlled Rectifier With Reduced Voltage Overshoot for CDM ESD Protection
    Chen, Wen-Yi
    Rosenbaum, Elyse
    Ker, Ming-Dou
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2012, 12 (01) : 10 - 14
  • [42] Novel SCR device for ESD protection with high-holding voltage in 0.18um BCD process
    Lim, Myoung Chul
    Eom, Young Bum
    Choi, Joung Cheul
    Nam, Sang Wook
    Park, Jeong Soo
    2023 7TH IEEE ELECTRON DEVICES TECHNOLOGY & MANUFACTURING CONFERENCE, EDTM, 2023,
  • [43] Implementation of initial-on ESD protection concept with PMOS-triggered SCR devices in deep-submicron CMOS technology
    Ker, Ming-Dou
    Chen, Shih-Hung
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2007, 42 (05) : 1158 - 1168
  • [44] Low-Capacitance Low-Voltage Triggered SCR ESD Clamp Using nMOS With Asymmetric Drain for RF ICs
    Park, Jae-Young
    Kim, Dae-Woo
    Son, Young-Sang
    Ha, Jong-Chan
    Song, Jong-Kyu
    Jang, Chang-Soo
    Jung, Won-Young
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2011, 59 (02) : 360 - 367
  • [45] ESD Protection Design for 60-GHz LNA With Inductor-Triggered SCR in 65-nm CMOS Process
    Lin, Chun-Yu
    Chu, Li-Wei
    Ker, Ming-Dou
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2012, 60 (03) : 714 - 723
  • [46] An SCR-Incorporated BJT Device for Robust ESD Protection With High Latchup Immunity in High-Voltage Technology
    Huang, Chih-Yao
    Chiu, Fu-Chien
    Chen, Quo-Ker
    Lai, Ming-Fang
    Tseng, Jen-Chou
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2012, 12 (01) : 113 - 123
  • [47] Gate-Lifted nMOS ESD Protection Device Triggered by a p-n-p in Series With a Diode
    Lai, Da-Wei
    Sque, Stephen
    Peters, Wim
    Smedes, Theo
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2019, 66 (04) : 1642 - 1647
  • [48] Native-NMOS-triggered SCR With faster turn-on speed for effective ESD protection in a 0.13-μm CMOS process
    Ker, MD
    Hsu, KC
    IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2005, 5 (03) : 543 - 554
  • [49] Investigation on SCR-based ESD protection device for biomedical integrated circuits in a 0.18-μm CMOS process
    Lin, Chun-Yu
    Chiu, Yan-Lian
    MICROELECTRONICS RELIABILITY, 2015, 55 (11) : 2229 - 2235
  • [50] SCR device with dynamic holding voltage for on-chip ESD protection in a 0.25-μm fully salicided CMOS process
    Ker, MD
    Chen, ZP
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (10) : 1731 - 1733
12345