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- [1] A PRACTICAL METHOD FOR REDUCING EFFECTS OF PARASITIC CAPACITANCES IN INTEGRATED CIRCUITS PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1967, 55 (02): : 235 - &
- [2] COMMENTS ON A PRACTICAL METHOD FOR REDUCING EFFECTS OF PARASITIC CAPACITANCES IN INTEGRATED CIRCUITS PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1967, 55 (11): : 2039 - &
- [3] Calculation of Induction Machine Parasitic Capacitances Using Finite Element Method 2016 ELEKTRO 11TH INTERNATIONAL CONFERENCE, 2016, : 176 - 179
- [4] A CALCULATION METHOD FOR TEMPERATURE DISTRIBUTION IN INTEGRATED CIRCUITS ELECTRONICS & COMMUNICATIONS IN JAPAN, 1969, 52 (06): : 150 - &
- [6] Calculation of multiconductor microstrip line capacitances using the semidiscrete finite element method IEEE Microwave and Guided Wave Letters, 1991, 1 (01): : 5 - 7
- [8] METHOD OF COMPUTER-AIDED LAYOUT DESIGN FOR INTEGRATED-CIRCUITS JOURNAL OF DESIGN AUTOMATION & FAULT-TOLERANT COMPUTING, 1979, 3 (3-4): : 191 - 209