共 50 条
- [31] Novel finite element method for the modelling of multiple reflections in photonic integrated circuits PHOTON MANAGEMENT II, 2006, 6187 : U275 - U286
- [32] CALCULATION OF CIRCUITS WITH LUMPED-ELEMENT CIRCULATORS RADIOTEKHNIKA I ELEKTRONIKA, 1973, 18 (09): : 1845 - 1850
- [33] Stray Capacitances Influences and Windings Layout of the Integrated-Transformer in the Input-Series Converter Diangong Jishu Xuebao/Transactions of China Electrotechnical Society, 2021, 36 (24): : 5272 - 5282
- [34] Identification of Integrated Circuits Based on Layout Layers Routing Information PROCEEDINGS OF THE 2021 IEEE CONFERENCE OF RUSSIAN YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING (ELCONRUS), 2021, : 1965 - 1968
- [35] COMPUTER-AIDED DESIGN OF THE LAYOUT OF INTEGRATED CIRCUITS (CADLIC). 1600, North-Holland Publ Co, Amsterdam, Neth
- [36] 3D Integrated Circuits Layout Optimization Game ARTIFICIAL INTELLIGENCE AND SOFT COMPUTING, ICAISC 2017, PT II, 2017, 10246 : 444 - 453
- [37] ON-LINE GRAPHICS APPLIED TO LAYOUT DESIGN OF INTEGRATED CIRCUITS PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1967, 55 (11): : 1982 - +
- [38] Optimization algorithm of the subnanosecond-range integrated circuits layout 20TH INTERNATIONAL CONFERENCE, EURO MINI CONFERENCE CONTINUOUS OPTIMIZATION AND KNOWLEDGE-BASED TECHNOLOGIES, EUROPT'2008, 2008, : 279 - 284