Fast Nonlinear Deterministic Calibration of Pipelined A/D Converters

被引:0
|
作者
Oshima, Takashi [1 ]
Takahashi, Tomorni [1 ]
Yarnawaki, Taizo [1 ]
Tsang, Cheonguyen [2 ]
Stepanovic, Dusan [2 ]
Nikolic, Borivoje [2 ]
机构
[1] Hitachi Ltd, Cent Res Lab, 1-280 Higashi Koigakubo, Kokubunji, Tokyo 1858601, Japan
[2] Univ Calif Berkeley, Berkeley Wireless Res Ctr, Berkeley, CA 94704 USA
关键词
Pipelined ADC; digital calibration; convergence time; MDAC; redundancy;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The high-speed and high-resolution ADC is a key enabler for many future wireless communications systems. The digital background calibration technique can be used to reduce the total power consumption by enhancing the linearity without using high-gain amplifiers. One of the main practical constraints in the wireless applications is a short time available for calibration. This paper proposes a novel fast calibration method of pipelined ADCs, suitable for wireless communications applications, where a sufficiently high resolution can be achieved without requiring any calibration period.
引用
收藏
页码:914 / +
页数:2
相关论文
共 50 条
  • [41] Capacitor mismatch calibration technique for pipelined A/D conversion
    Li, Fu-Le
    Li, Dong-Mei
    Zhang, Chun
    Wang, Zhi-Hua
    Tien Tzu Hsueh Pao/Acta Electronica Sinica, 2002, 30 (11): : 1704 - 1706
  • [42] A deterministic digital calibration technique for pipelined ADCs using a non-nested algorithm
    Chinmaye Ramamurthy
    Surya Padma
    Chetan Parikh
    Subhajit Sen
    Analog Integrated Circuits and Signal Processing, 2022, 110 : 557 - 568
  • [43] Fast pipelined A/D converter in CMOS technology
    Park, SB
    Greeneich, EW
    ISCAS '98 - PROCEEDINGS OF THE 1998 INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-6, 1998, : 1 - 4
  • [44] New approach for digital calibration of pipelined analog to digital converters based on secant method
    Zia, Ehsan
    Shamsi, Alireza
    Mazloum, Jalil
    INTEGRATION-THE VLSI JOURNAL, 2022, 82 : 89 - 95
  • [45] DETERMINISTIC SCHEDULING WITH PIPELINED PROCESSORS
    BRUNO, J
    JONES, JW
    SO, K
    IEEE TRANSACTIONS ON COMPUTERS, 1980, 29 (04) : 308 - 316
  • [46] Homogeneity Enforced Calibration for Pipelined ADCs Including Nonlinear Stage Amplifiers
    Wagner, Matthias
    Lang, Oliver
    Ghafi, Esmaeil K.
    Schwarz, Andreas
    Huemer, Mario
    2023 18TH CONFERENCE ON PH.D RESEARCH IN MICROELECTRONICS AND ELECTRONICS, PRIME, 2023, : 153 - 156
  • [47] PN-Assisted Deterministic Digital Background Calibration of Multistage Split-Pipelined ADC
    Sarkar, Sudipta
    Zhou, Yuan
    Elies, Brian
    Chiu, Yun
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2015, 62 (03) : 654 - 661
  • [48] Low power low voltage current mode pipelined a/d converters
    Wawryn, Krzysztof
    Suszyński, Robert
    Strzeszewski, Bogdan
    World Academy of Science, Engineering and Technology, 2010, 41 : 1051 - 1056
  • [49] Developing Model-Based Design Evaluation for Pipelined A/D Converters
    Struhovsky, Petr
    Subrt, Ondrej
    Hospodka, Jiri
    Martinek, Pravoslav
    RADIOENGINEERING, 2012, 21 (03) : 898 - 903
  • [50] Low Power low voltage current mode pipelined A/D converters
    Wawryn, Krzysztof
    Suszyński, Robert
    Strzeszewski, Bogdan
    World Academy of Science, Engineering and Technology, 2010, 65 : 1051 - 1056