Circuit Design Challenges in Computing-in-Memory for AI Edge Devices

被引：0

作者：

Si, Xin ^{[1
,2
]}

Xue, Cheng-Xin ^{[1
]}

Su, Jian-Wei ^{[3
]}

Zhang, Zhixiao ^{[1
]}

Li, Sih-Han ^{[3
]}

Sheu, Shyh-Shyuan ^{[3
]}

Lee, Heng-Yuan ^{[3
]}

Chen, Ping-Cheng ^{[4
]}

Wu, Huaqiang ^{[5
]}

Qian, He ^{[5
]}

Chang, Meng-Fan ^{[1
]}

机构：

[1] Natl Tsing Hua Univ, Hsinchu, Taiwan

[2] Univ Elect Sci & Technol China, Chengdu, Sichuan, Peoples R China

[3] Ind Technol Res Inst, Hsinchu, Taiwan

[4] I Shou Univ, Kaohsiung, Taiwan

[5] Tsinghua Univ, Beijing, Peoples R China

来源：

2019 IEEE 13TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | 2019年

关键词：

Artificial Intelligence (AI); Internet of Things (IoT); SRAM; Nonvolatile memory (NVM); computing-in-memory (CIM); NONVOLATILE SRAM; RERAM; SCHEME; IMPROVEMENT; BACKUP; SPEED;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Computing-in-memory (CIM) structures are meant to overcome the memory bottleneck and improve energy efficiency for artificial intelligence (AI) edge devices. In this article, we review recent trends in the development of CIM macros for the Internet of Things and AI applications. We also look at recent advances in the development of CIMs based on SRAM and nonvolatile memory for AI edge devices as well as the challenges involved in circuit design.

引用

页数：4

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