Combined heuristics for synthesis of SOCs with time and power constraints

被引:6
|
作者
Mandoum, A. [1 ]
机构
[1] Ctr Dev Technol Avancees, Div Microelect & Nanotechnol, Algiers, Algeria
关键词
MAXIMIZING REWARDS; OPTIONAL CYCLES; VOLTAGES; SYSTEMS; ASSIGNMENT;
D O I
10.1016/j.compeleceng.2012.07.008
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper looks at the highest design level and presents a methodology for designing Systems On Chip (SOC) with low energy dissipation. The aim is achieved through a functional decomposition of the system, followed by an appropriate allocation of tasks to the different components of the system (ASICs and processors). With our approach, it is possible to generate architectures with different features (time and energy), which allows the designer to fastly obtain the architecture that best suits his application. (C) 2012 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1687 / 1702
页数:16
相关论文
共 50 条
  • [1] On a Rewriting Strategy for Dynamically Managing Power Constraints and Power Dissipation in SoCs
    Viswanath, Vinod
    Muralidhar, Rajeev
    Seshadri, Harinarayanan
    Abraham, Jacob A.
    [J]. PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 2013, : 128 - 134
  • [2] Evaluation of Heuristics to Manage a Data Center Under Power Constraints
    De Nardin, Igor Fontana
    Stolf, Patricia
    Caux, Stephane
    [J]. 2022 IEEE 13TH INTERNATIONAL GREEN AND SUSTAINABLE COMPUTING CONFERENCE (IGSC), 2022, : 13 - 20
  • [3] Power estimation of time variant SoCs with TAPES
    Lankes, Andreas
    Wild, Thomas
    Zeppenfeld, Johannes
    [J]. DSD 2007: 10TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN ARCHITECTURES, METHODS AND TOOLS, PROCEEDINGS, 2007, : 261 - 264
  • [4] Heuristics for the local grid scheduling problem with processing time constraints
    Grandinetti, Lucio
    Guerriero, Francesca
    Pugliese, Luigi Di Puglia
    Sheikhalishahi, Mehdi
    [J]. JOURNAL OF HEURISTICS, 2015, 21 (04) : 523 - 547
  • [5] Heuristics for the local grid scheduling problem with processing time constraints
    Lucio Grandinetti
    Francesca Guerriero
    Luigi Di Puglia Pugliese
    Mehdi Sheikhalishahi
    [J]. Journal of Heuristics, 2015, 21 : 523 - 547
  • [6] Heuristics and metaheuristics to minimize makespan for flowshop with peak power consumption constraints
    Li, Yuan-Zhen
    Gao, Kaizhou
    Meng, Lei-Lei
    Jing, Xue-Lei
    Zhang, Biao
    [J]. INTERNATIONAL JOURNAL OF INDUSTRIAL ENGINEERING COMPUTATIONS, 2023, : 221 - 238
  • [7] Power-time tradeoff in test scheduling for SoCs
    Nourani, M
    Chin, J
    [J]. 21ST INTERNATIONAL CONFERENCE ON COMPUTER DESIGN, PROCEEDINGS, 2003, : 548 - 553
  • [8] Shrimp Feed Formulation via Evolutionary Algorithm with Power Heuristics for Handling Constraints
    Abd Rahman, Rosshairy
    Kendall, Graham
    Ramli, Razamin
    Jamari, Zainoddin
    Ku-Mahamud, Ku Ruhana
    [J]. COMPLEXITY, 2017,
  • [9] Heuristics for Safety and Security Constraints
    Nielson, Flemming
    Nielson, Hanne Riis
    [J]. ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2007, 172 (523-543) : 523 - 543
  • [10] Artificial intelligence heuristics in solving vehicle routing problems with time window constraints
    Tan, KC
    Lee, LH
    Ou, K
    [J]. ENGINEERING APPLICATIONS OF ARTIFICIAL INTELLIGENCE, 2001, 14 (06) : 825 - 837