Highly accurate cyclic CMOS time-to-digital converter with extremely low power consumption

被引：11
|
作者：
Chen, PK
Liu, SI
Wu, JH
机构：
[1] Department of Electrical Engineering, National Taiwan University
来源：
ELECTRONICS LETTERS | 1997年 / 33卷 / 10期
关键词：
CMOS integrated circuits; instrumentation;
D O I：
10.1049/el:19970594
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The authors propose a new cyclic structure for a CMOS time-to- digital converter (TDC). The measured single-shot resolution is 286ps, and the measured single-shot accuracy is < 143ps. The new circuit can be shut down between measurements which makes the circuit suitable for portable applications.
引用
收藏
页码：858 / 860
页数：3
相关论文
共 50 条
  • [1] A LOW-POWER CMOS TIME-TO-DIGITAL CONVERTER
    RAISANENRUOTSALAINEN, E
    RAHKONEN, T
    KOSTAMOVAARA, J
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1995, 30 (09) : 984 - 990
  • [2] Low-power CMOS time-to-digital converter
    Univ of Oulu, Oulu, Finland
    [J]. IEEE J Solid State Circuits, 9 (984-990):
  • [3] A low power high accuracy CMOS time-to-digital converter
    Chen, PK
    Liu, SI
    Wu, JS
    [J]. ISCAS '97 - PROCEEDINGS OF 1997 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I - IV: CIRCUITS AND SYSTEMS IN THE INFORMATION AGE, 1997, : 281 - 284
  • [4] A precise cyclic CMOS time-to-digital converter with low thermal sensitivity
    Chen, CC
    Chen, P
    Hwang, CS
    Chang, W
    [J]. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2005, 52 (04) : 834 - 838
  • [5] A precise cyclic CMOS time-to-digital converter with low thermal sensitivity
    Chen, CC
    Chang, W
    Chen, P
    [J]. 2004 IEEE NUCLEAR SCIENCE SYMPOSIUM CONFERENCE RECORD, VOLS 1-7, 2004, : 1364 - 1367
  • [6] Design of an All-Digital, Low Power Time-to-Digital Converter in 0.18μm CMOS
    Pokhara, Ankur
    Agrawal, Jatin
    Mishra, Biswajit
    [J]. 2017 7TH INTERNATIONAL SYMPOSIUM ON EMBEDDED COMPUTING AND SYSTEM DESIGN (ISED), 2017,
  • [7] A Low Power Two-Step Cyclic Time-to-Digital Converter without Startup Time Error in 180 nm CMOS
    Van Nhan Nguyen
    Lee, Jong-Wook
    [J]. PROCEEDINGS OF 2018 2ND INTERNATIONAL CONFERENCE ON RECENT ADVANCES IN SIGNAL PROCESSING, TELECOMMUNICATIONS & COMPUTING (SIGTELCOM 2018), 2018, : 116 - 120
  • [8] A REVIEW OF CMOS TIME-TO-DIGITAL CONVERTER
    Wang, Zixuan
    Huang, Cheng
    Wu, Jianhui
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (07)
  • [9] A low-cost low-power CMOS time-to-digital converter based on pulse stretching
    Chen, Poki
    Chen, Chun-Chi
    Shen, You-g Shen
    [J]. IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2006, 53 (04) : 2215 - 2220
  • [10] Cyclic CMOS time-to-digital converter with deep sub-nanosecond resolution
    Chen, Poki
    Liu, Shen-Iuan
    [J]. Proceedings of the Custom Integrated Circuits Conference, 1999, : 605 - 608
12345