Simple and Accurate Model for the Propagation Delay in MCML Gates

被引：0

作者：

Giustolisi, Gianluca ^{[1
]}

Scotti, Giuseppe ^{[2
]}

Palumbo, Gaetano ^{[1
]}

机构：

[1] Univ Catania, Dipartimento Ingn Elettr Elettron & Informat DIEEI, I-95123 Catania, Italy

[2] Univ Roma La Sapienza, Dipartimento Ingn Informaz Elettron & Telecomunica, I-00184 Rome, Italy

来源：

ELECTRONICS | 2023年 / 12卷 / 12期

关键词：

Current Mode Logic; digital circuits; MCML; nanometer CMOS; propagation delay; DESIGN STRATEGIES; OPTIMIZED DESIGN; LOGIC; CML; ECL; POWER; TECHNOLOGY; EXPRESSION;

D O I：

10.3390/electronics12122680

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this article, we develop a simple and accurate model for evaluating the propagation delay in MOS Current-Mode Logic (MCML) gates. The model describes the behavior of MCML gates in a linear fashion despite the circuits themselves being non-linear. Indeed, we demonstrate that a linear model can be used, provided that, for each small-signal parameter, its average value calculated between the two different switching logic states is used. The proposed model is validated through simulations of MCML universal gates designed using modern nanometer processes. The model forecasts simulated values with an error lower than 4% and 20% in 65-nm standard CMOS and 28-nm Fully-Depleted Silicon-On-Insulator (FD-SOI), respectively.

引用

页数：20

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