Model Checking for Proving and Improving Fault Tolerance of Satellites

被引:1
|
作者
Kiesbye, Jonis [1 ]
Grover, Kush [2 ]
Kretinsky, Jan [2 ]
机构
[1] Tech Univ Munich, Chair Astronaut, D-85748 Garching, Germany
[2] Tech Univ Munich, Chair Theoret Comp Sci, D-85748 Garching, Germany
关键词
D O I
10.1109/AERO55745.2023.10115801
中图分类号
V [航空、航天];
学科分类号
08 ; 0825 ;
摘要
Developing the Fault Detection, Isolation & Recovery (FDIR) policy often happens late in the design phase of a spacecraft and might reveal significant gaps in the redundancy concept. We propose a process for continuously analyzing and improving the architecture of a spacecraft throughout the design phase to ensure successful fault isolation and recovery. The systems engineer provides a graph of the system's architecture containing the functional modes, the hardware components, and their dependency on each other as an input and gets back a weakness report listing the gaps in the redundancy concept. Overlaying the sub-graphs for every fault scenario allows us to reason about the feasibility of fault isolation and recovery. The graph is automatically converted to a Markov Decision Process for use with a model checker to generate a control policy for the FDIR process. The model is optimized by pruning inefficient branches with Monte Carlo Tree Search. We export this policy as a decision tree that ensures explainability, fast execution, and low memory requirements during runtime. We also generate C-code for fault isolation and reconfiguration that can be integrated in the FDIR software. The tool was used on system architectures created in the Modular ADCS project which is part of ESA's GSTP program. In this context, it helped to yield an effective redundancy concept with minimum overhead and dramatically reduce the programming effort for FDIR routines. Since we use model checking for the analysis, the designer gains formal verification of the robustness towards faults.
引用
收藏
页数:9
相关论文
共 50 条
  • [31] FORMAL VERIFICATION OF FAULT TOLERANCE USING THEOREM-PROVING TECHNIQUES
    KLJAICH, J
    SMITH, BT
    WOJCIK, AS
    IEEE TRANSACTIONS ON COMPUTERS, 1989, 38 (03) : 366 - 376
  • [32] Model checking fault tolerant systems
    Bernardeschi, C
    Fantechi, A
    Gnesi, S
    SOFTWARE TESTING VERIFICATION & RELIABILITY, 2002, 12 (04): : 251 - 275
  • [33] Hybrid tool integrating HOL theorem proving with MDG model checking
    Mizouni, R
    Tahar, S
    Curzon, P
    16TH INTERNATIONAL CONFERENCE ON MICROELECTRONICS, PROCEEDINGS, 2004, : 392 - 395
  • [34] Hybrid verification integrating HOL theorem proving with MDG model checking
    Mizouni, Rabeb
    Tahar, Sofiene
    Curzon, Paul
    MICROELECTRONICS JOURNAL, 2006, 37 (11) : 1200 - 1207
  • [35] Proving QBF-Hardness in Bounded Model Checking for Incomplete Designs
    Miller, Christian
    Scholl, Christoph
    Becker, Bernd
    2013 14TH INTERNATIONAL WORKSHOP ON MICROPROCESSOR TEST AND VERIFICATION (MTV): COMMON CHALLENGES AND SOLUTIONS, 2013, : 23 - 28
  • [36] Potential synergies of theorem proving and model checking for software product lines
    Thüm, Thomas
    Meinicke, Jens
    Benduhn, Fabian
    Hentschel, Martin
    Von Rhein, Alexander
    Saake, Gunter
    ACM International Conference Proceeding Series, 2014, 1 : 177 - 186
  • [37] Potential Synergies of Theorem Proving and Model Checking for Software Product Lines
    Thuem, Thomas
    Meinicke, Jens
    Benduhn, Fabian
    Hentschel, Martin
    von Rhein, Alexander
    Saake, Gunter
    18TH INTERNATIONAL SOFTWARE PRODUCT LINE CONFERENCE (SPLC 2014), VOL 1, 2014, : 177 - 186
  • [38] Improving pushdown system model checking
    Lal, Akash
    Reps, Thomas
    COMPUTER AIDED VERIFICATION, PROCEEDINGS, 2006, 4144 : 343 - 357
  • [39] Improving Communication for Distributed Model Checking
    Fourie, Jean
    Geldenhuys, Jaco
    Inggs, Cornelia
    PROCEEDINGS OF THE SOUTH AFRICAN INSTITUTE FOR COMPUTER SCIENTISTS AND INFORMATION TECHNOLOGISTS CONFERENCE, 2012, : 41 - 50
  • [40] IMPROVING THE RELIABILITY OF BUS SYSTEMS - FAULT ISOLATION AND FAULT TOLERANCE
    VOGT, R
    MICROPROCESSING AND MICROPROGRAMMING, 1987, 21 (1-5): : 333 - 338