3-D Self-Aligned Stacked Ge Nanowire pGAAFET on Si nFinFET of Single Gate CFET

In this study, we propose a self-aligned stacked Ge nanowire (NW) p-type gate-all-around field-effect transistor (pGAAFET) on Si nFinFET of single gate complementary FET (CFET). The self-aligned stacked Ge NW pGAAFET on Si nFinFET of single gate CFET device is fabricated on a SOI wafer. The CFET device is fully compatible with current Si technology platform using alternating anisotropic and isotropic dry etching process. The Ge NW pGAAFET presents an on-state current (I-ON) of 166 mu A/mu m at V-D = V-G-V-TH = -0.5 V and shows minimum subthreshold swing (SSmin) of 79, 91 mV/dec, and I-ON/IOFF of 3.03 x 10(5), 3.4 x 10(4 )at VD = -0.05 V and -0.5 V, respectively. The Si nFinFET presents an ION of 60.4 mu A/mu m at V-D = VG-VTH = 0.5 V and shows SSmin of 91, 101 mV/dec, and I-ON/I-OFF of 9.01 x 10(4), 5.62 x 10(5) at V-D = 0.05 V and 0.5 V, respectively. The proposed CFET can simplify the process and shows promising potential for extending scaling beyond the technology node.