Tightly Stacked 3D Diamond-Shaped Ge Nanowire Gate-All-Around FETs With Superior nFET and pFET Performance

被引：3
|
作者：
Lin, Yi-Wen [1 ]
Chang, Hao-Hsiang [1 ]
Huang, Yu-Hsien [1 ]
Sun, Chong-Jhe [1 ]
Yan, Siao-Cheng [1 ]
Lin, Shan-Wen [1 ]
Luo, Guang-Li [2 ]
Wu, Chien-Ting [2 ]
Wu, Yung-Chun [1 ]
Hou, Fu-Ju [2 ]
机构：
[1] Natl Tsing Hua Univ, Dept Engn & Syst Sci, Hsinchu 30013, Taiwan
[2] Taiwan Semicond Res Inst, Hsinchu 300091, Taiwan
来源：
IEEE ELECTRON DEVICE LETTERS | 2021年 / 42卷 / 12期
关键词：
3D diamond-shaped; Ge nanowire (NW); gate-all-around (GAA); subthreshold swing (SS); field-effect transistor (FET);
D O I：
10.1109/LED.2021.3125059
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
We propose that the use of tightly stacked three-dimensional (3D) diamond-shaped Ge nanowire (NW) gate-all-around field-effect transistor (Ge-NW GAAFET) is a feasible approach to continuous scaling. The proposed devices with the Al2O3 dielectric exhibit high ISAT of 1200 mu A/mu m (pFET) and 1100 mu A/mu m (nFET), high I-ON/I-OFF ratio of approximately 1 x 10(5), and steep subthreshold swing (SS) close to 70mV/dec. Superior gate control of the Ge-NW GAAFET was confirmed by the 3D TCAD simulation for the sub-3nm node applications. The formation of the tightly stacked Ge NWs is fully compatible with the complementary metal oxide semiconductor (CMOS) technology platform using only alternating isotropic and anisotropic dry etching, thus showing promising potential for extending CMOS scaling in the vertical direction.
引用
收藏
页码：1727 / 1730
页数：4
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