Comparative Study of Keccak SHA-3 Implementations

被引:3
|
作者
Dolmeta, Alessandra [1 ]
Martina, Maurizio [1 ]
Masera, Guido [1 ]
机构
[1] Politecn Torino, Dept Elect & Telecommun DET, I-10129 Turin, Italy
关键词
hash function; SHA-3; Keccak; hardware design; accelerator; FPGA; ASIC; cryptography; post-quantum cryptography; HW/SW co-design; INSTRUCTION SET EXTENSIONS; DATA INTEGRITY; EFFICIENT;
D O I
10.3390/cryptography7040060
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
This paper conducts an extensive comparative study of state-of-the-art solutions for implementing the SHA-3 hash function. SHA-3, a pivotal component in modern cryptography, has spawned numerous implementations across diverse platforms and technologies. This research aims to provide valuable insights into selecting and optimizing Keccak SHA-3 implementations. Our study encompasses an in-depth analysis of hardware, software, and software-hardware (hybrid) solutions. We assess the strengths, weaknesses, and performance metrics of each approach. Critical factors, including computational efficiency, scalability, and flexibility, are evaluated across different use cases. We investigate how each implementation performs in terms of speed and resource utilization. This research aims to improve the knowledge of cryptographic systems, aiding in the informed design and deployment of efficient cryptographic solutions. By providing a comprehensive overview of SHA-3 implementations, this study offers a clear understanding of the available options and equips professionals and researchers with the necessary insights to make informed decisions in their cryptographic endeavors.
引用
收藏
页数:16
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