Dual-Stepped Gate Vertical Double-Diffused Metal-Oxide-Semiconductor Field-Effect Transistor with Enhanced Device Performance

Herein, vertical double-diffused metal-oxide-semiconductor field-effect transistor(VDMOS) with improved device structure is proposed. Gate engineering is applied in the proposed device and two devices namely dual-stepped gate technology (DSGT) and modified dual-stepped gate technology (m-DSGT) are proposed here. Due to the effect of gate engineering, switching ability is improved and area specific on-resistance is reduced. Devices are simulated using Silvaco Atlas software. Breakdown voltages for conventional and m-DSGT are 278.63 and 280.02 V, respectively, for VGS$V_{\text{GS}}$ = 0 V. The current density of conventional and m-DSGT devices is 49.2$49.2$ and 178.5 A cm-2$178.5 \textrm{ } \text{A} \textrm{ } \left(\text{cm}\right)<^>{- 2}$ under the conditions on gate-driven voltage of 1 V for VDS$V_{\text{DS}}$ = 10 V. Using 2D numerical simulations, the electrical performance of both DSGT and m-DSGT devices is examined. The results demonstrate 76.6% decrease in specific on-resistance, 4.22 times increase in current density, and 26.67% faster switching speed compared to conventional VDMOS, thus, improving the device performance. This study proposes a dual-stepped gate technology, DSGT vertical double-diffused (VDMOS), and m-DSGT VDMOS (m-DSGT), with enhanced drain current and switching delay. The device consists of two gates set up stepwise from channel to drift zone, increasing device switching and gate control. 2D simulations show enhanced linearity, decreased switching delay, and reduced specific on-resistance.image (c) 2024 WILEY-VCH GmbH