A novel 4H-SiC trench MOSFET with double shielding structures and ultralow gate-drain charge

被引：0

作者：

Xiaorong Luo ^{[1
]}

Tian Liao ^{[1
]}

Jie Wei ^{[1
]}

Jian Fang ^{[1
]}

Fei Yang ^{[2
]}

Bo Zhang ^{[1
]}

机构：

[1] State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China

[2] Global Energy Interconnection Research Institute

来源：

Journal of Semiconductors | 2019年 / 05期

关键词：

SiC trench MOSFET; reverse transfer capacitance; gate-drain charge; figure of merit;

D O I：

暂无

中图分类号：

TN31 [半导体二极管];

学科分类号：

0805 ; 080501 ; 080502 ; 080903 ;

摘要：

A new ultralow gate–drain charge(Q;) 4 H-SiC trench MOSFET is presented and its mechanism is investigated by simulation. The novel MOSFET features double shielding structures（DS-MOS）: one is the grounded split gate（SG）, the other is the P+shielding region（PSR）. Both the SG and the PSR reduce the coupling effect between the gate and the drain, and transform the most part of the gate–drain capacitance(C;) into the gate–source capacitance(C;) and drain–source capacitance(C;) in series.Thus the C;is reduced and the proposed DS-MOS obtains ultralow Q;. Compared with the double-trench MOSFET（DT-MOS）and the conventional trench MOSFET（CT-MOS）, the proposed DS-MOS decreases the Q;by 85% and 81%, respectively.Moreover, the figure of merit（FOM）, defined as the product of specific on-resistance(R;) and Q;(R;Q;), is reduced by 84% and 81%, respectively.

引用

页码：71 / 76

页数：6

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