Metastable Electron Traps in Modified Silicon-on-Insulator Wafer

被引:0
|
作者
戴丽华 [1 ,2 ]
毕大炜 [1 ]
张正选 [1 ]
解鑫 [1 ,2 ]
胡志远 [1 ]
黄辉祥 [3 ]
邹世昌 [1 ]
机构
[1] State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences
[2] University of Chinese Academy of Sciences
[3] Information Engineering College, Jimei University
基金
中国国家自然科学基金;
关键词
SOI; Si; Metastable Electron Traps in Modified Silicon-on-Insulator Wafer;
D O I
暂无
中图分类号
TN304.12 [];
学科分类号
0805 ; 080501 ; 080502 ; 080903 ;
摘要
We perform the total ionizing radiation and electrical stress experiments to investigate the electrical characteristics of the modified silicon-on-insulator(SOI) wafers under different Si ion implantation conditions. It is confirmed that Si implantation into the buried oxide can create deep electron traps with large capture cross section to effectively improve the antiradiation capability of the SOI device. It is first proposed that the metastable electron traps accompanied with Si implantation can be avoided by adjusting the peak location of the Si implantation reasonably.
引用
收藏
页码:91 / 94
页数:4
相关论文
共 50 条
  • [1] Metastable Electron Traps in Modified Silicon-on-Insulator Wafer
    Dai, Li-Hua
    Bi, Da-Wei
    Zhang, Zheng-Xuan
    Xie, Xin
    Hu, Zhi-Yuan
    Huang, Hui-Xiang
    Zou, Shi-Chang
    CHINESE PHYSICS LETTERS, 2018, 35 (05)
  • [2] Metastable Electron Traps in Modified Silicon-on-Insulator Wafer
    戴丽华
    毕大炜
    张正选
    解鑫
    胡志远
    黄辉祥
    邹世昌
    Chinese Physics Letters, 2018, 35 (05) : 91 - 94
  • [3] SILICON-ON-INSULATOR BY WAFER BONDING - A REVIEW
    MASZARA, WP
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1991, 138 (01) : 341 - 347
  • [4] WAFER BONDING FOR SILICON-ON-INSULATOR TECHNOLOGIES
    LASKY, JB
    APPLIED PHYSICS LETTERS, 1986, 48 (01) : 78 - 80
  • [5] WAFER BONDING TECHNIQUE FOR SILICON-ON-INSULATOR TECHNOLOGY
    ABE, T
    MATLOCK, JH
    SOLID STATE TECHNOLOGY, 1990, 33 (11) : 39 - 40
  • [6] Process for extremely thin silicon-on-insulator wafer
    Usenko, AY
    Carr, WN
    Chen, B
    NANOTECH 2003, VOL 1, 2003, : 546 - 549
  • [7] Traps at the bonded interface in silicon-on-insulator structures
    Antonova, IV
    Naumova, OV
    Nikolaev, DV
    Popov, VP
    Stano, J
    Skuratov, VA
    APPLIED PHYSICS LETTERS, 2001, 79 (27) : 4539 - 4540
  • [8] SILICON-WAFER BONDING MECHANISM FOR SILICON-ON-INSULATOR STRUCTURES
    ABE, T
    TAKEI, T
    UCHIYAMA, A
    YOSHIZAWA, K
    NAKAZATO, Y
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 2-LETTERS & EXPRESS LETTERS, 1990, 29 (12): : L2311 - L2314
  • [9] Wafer bonding of diamond films to silicon for silicon-on-insulator technology
    Yushin, GN
    Wolter, SD
    Kvit, AV
    Collazo, R
    Prater, JT
    Stoner, BR
    Sitar, Z
    MATERIALS ISSUES IN NOVEL SI-BASED TECHNOLOGY, 2002, 686 : 69 - 74
  • [10] SILICON-ON-INSULATOR WAFER BONDING-WAFER THINNING TECHNOLOGICAL EVALUATIONS
    HAISMA, J
    SPIERINGS, GACM
    BIERMANN, UKP
    PALS, JA
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1989, 28 (08): : 1426 - 1443