Dual in-memory computing of matrix-vector multiplication for accelerating neural networks

In-memory computing (IMC) aims to solve the von Neumann bottleneck by performing computations in the memory unit. However, the conventional IMC scheme only partially solves this issue, and it causes a digital- to-analog conversion overhead in performing analog matrix-vector multiplication (MVM). Here, we develop a dual-IMC scheme, which implies that both the weight and input of a neural network are stored in the memory array. The scheme performs MVM operations in a fully in-memory manner, eliminating the need for data transfer. We have tested our proof of concept by fabricating resistive random-access memory (RRAM) devices using semiconductor processes to experimentally demonstrate dual-IMC for signal recovery and image processing. Evaluations show that it achieves 3-4 orders of magnitude of improvement in the energy efficiency of MVM.