A High-Entropy True Random Number Generator with Keccak Conditioning for FPGA

被引:0
|
作者
Piscopo, Valeria [1 ]
Dolmeta, Alessandra [1 ]
Mirigaldi, Mattia [1 ]
Martina, Maurizio [1 ]
Masera, Guido [1 ]
机构
[1] Politecn Torino, Dept Elect & Telecommun, I-10129 Turin, Italy
关键词
True Random Number Generators; ring oscillators; entropy; open-source hardware; key generation; FPGA;
D O I
10.3390/s25061678
中图分类号
O65 [分析化学];
学科分类号
070302 ; 081704 ;
摘要
Any cryptographic system strongly relies on randomness to ensure robust encryption and masking methods. True Random Number Generators play a fundamental role in this context. The National Institute of Standards and Technology (NIST) and the Bundesamt f & uuml;r Sicherheit in der Informationstechnik (BSI) provide guidelines for designing reliable entropy sources to fuel cryptographic Random Bit Generators. This work presents a highly parameterized, open-source implementation of a TRNG based on ring oscillators, complemented by an optimized Keccak conditioning unit. The design process is accompanied by a thorough study of the relevant literature and standards, specifying the requirements for reliable entropy sources in cryptographic systems. The design of the TRNG proposed in this paper aims to strike a balance between area, throughput, power consumption, and entropy, while adhering to these guidelines. The proposed design has undergone extensive testing and validation and has successfully passed the NIST SP 800-22, NIST SP 800-90B, and BSI AIS-31 tests, achieving a min-entropy per bit of 0.9982 (NIST) and 0.9998 (BSI).
引用
收藏
页数:20
相关论文
共 50 条
  • [31] Chaotic Ring Oscillator Based True Random Number Generator Implementations in FPGA
    Zacharias, Ajish
    Gisha, C. G.
    Jose, Bijoy A.
    2020 24TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2020,
  • [32] Dual-metastability FPGA-based true random number generator
    Wieczorek, P. Z.
    ELECTRONICS LETTERS, 2013, 49 (12) : 744 - 745
  • [33] A Self-Timed Ring Based True Random Number Generator on FPGA
    Zhang, Yifan
    Jiang, Jianfei
    Wang, Qin
    Guan, Nin
    2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2018, : 983 - 985
  • [34] On-the fly evaluation of FPGA-based True Random Number Generator
    Santoro, Renaud
    Sentieys, Olivier
    Roy, Sebastien
    2009 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI, 2009, : 55 - +
  • [35] High speed true random number generator with a new structure of coarse-tuning PDL in FPGA
    Hongzhen Fang
    Pengjun Wang
    Xu Cheng
    Keji Zhou
    Journal of Semiconductors, 2018, 39 (03) : 64 - 69
  • [36] Implementation of Non-periodic Sampling True Random Number Generator on FPGA
    Tuncer, Taner
    Avaroglu, Erdinc
    Turk, Mustafa
    Ozer, A. Bedri
    INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS, 2014, 44 (04): : 296 - 302
  • [37] Revealing the Secret Parameters of an FPGA-based "True" Random Number Generator
    Ergun, Salih
    Acar, Burak
    2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2020,
  • [38] High speed true random number generator with a new structure of coarse-tuning PDL in FPGA
    Fang, Hongzhen
    Wang, Pengjun
    Cheng, Xu
    Zhou, Keji
    JOURNAL OF SEMICONDUCTORS, 2018, 39 (03)
  • [39] The design and realization of a new high speed FPGA-based chaotic true random number generator
    Koyuncu, Ismail
    Ozcerit, Ahmet Turan
    COMPUTERS & ELECTRICAL ENGINEERING, 2017, 58 : 203 - 214
  • [40] High speed true random number generator with a new structure of coarse-tuning PDL in FPGA
    Hongzhen Fang
    Pengjun Wang
    Xu Cheng
    Keji Zhou
    Journal of Semiconductors, 2018, (03) : 64 - 69