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- [4] Compliant probe substrates for testing high pin-count chip scale packages 52ND ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2002 PROCEEDINGS, 2002, : 1188 - 1193
- [5] Area-efficient area pad design for high pin-count chips NINTH GREAT LAKES SYMPOSIUM ON VLSI, PROCEEDINGS, 1999, : 78 - 81
- [6] Pin-count reduction for continuous flow microfluidic biochips MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS, 2018, 24 (01): : 483 - 494
- [7] Pin-count reduction for continuous flow microfluidic biochips Microsystem Technologies, 2018, 24 : 483 - 494
- [10] A novel low-cost pluggable chip scale package for high pin-count applications 51ST ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 2001, : 69 - 73