Improvement of the safe operating area for p-channel insulated-gate bipolar transistors (IGBTs)

被引：0
|
作者：
Ueno, Katsunori [1 ]
Hoshi, Yasuyuki [1 ]
Iwamuro, Noriyuki [1 ]
Kumagai, Naoki [1 ]
Hashimoto, Osamu [1 ]
机构：
[1] Fuji Electric Corp, Nagano, Japan
来源：
Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers | 1991年 / 30卷 / 6 A期
关键词：
Transistors; Bipolar;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：966 / 969
相关论文
共 50 条
  • [31] Efficient Thermal-Impedance Simulation of Insulated-Gate Bipolar Transistors Modules on Heat Sinks
    Gradinger, Thomas B.
    Drofenik, Uwe
    JOURNAL OF THERMAL SCIENCE AND ENGINEERING APPLICATIONS, 2013, 5 (04)
  • [32] Paralleling insulated-gate bipolar transistors in the H-bridge structure to reduce current stress
    Majid Memarian Sorkhabi
    Karen Wendt
    Daniel Rogers
    Timothy Denison
    SN Applied Sciences, 2021, 3
  • [33] INTERACTION BETWEEN MONOLITHIC, JUNCTION-ISOLATED LATERAL INSULATED-GATE BIPOLAR-TRANSISTORS
    CHOW, TP
    PATTANAYAK, DN
    BALIGA, BJ
    ADLER, MS
    HENNESSY, WA
    LOGAN, CE
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1991, 38 (02) : 310 - 315
  • [34] THE EFFECT OF SUBSTRATE DOPING ON THE PERFORMANCE OF ANODE-SHORTED N-CHANNEL LATERAL INSULATED-GATE BIPOLAR-TRANSISTORS
    CHOW, TP
    BALIGA, BJ
    PATTANAYAK, DN
    ADLER, MS
    IEEE ELECTRON DEVICE LETTERS, 1988, 9 (09) : 450 - 452
  • [35] Design and Process Variation Analysis of High-performance n and p-channel Insulated-gate Asymmetric-DG MOSFET
    Namrata Mendiratta
    Suman Lata Tripathi
    Manoj Singh Adhikari
    Silicon, 2023, 15 : 8019 - 8029
  • [36] Design and Process Variation Analysis of High-performance n and p-channel Insulated-gate Asymmetric-DG MOSFET
    Mendiratta, Namrata
    Tripathi, Suman Lata
    Adhikari, Manoj Singh
    SILICON, 2023, 15 (18) : 8019 - 8029
  • [37] Robust reverse bias safe operating area and improved electrical performance in 3300 V non-proportionally scaled insulated gate bipolar transistors
    Zhou, Xiang
    Fukui, Munetoshi
    Takeuchi, Kiyoshi
    Saraya, Takuya
    Saito, Wataru
    Hiramoto, Toshiro
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2024, 63 (02)
  • [38] 500-V N-CHANNEL INSULATED-GATE BIPOLAR-TRANSISTOR WITH A TRENCH GATE STRUCTURE
    CHANG, HR
    BALIGA, BJ
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1989, 36 (09) : 1824 - 1829
  • [39] Measurement Deviation of the Virtual Junction Temperature by the Saturation Voltage Drop Method for Insulated-Gate Bipolar Transistors
    Li, Yumeng
    Guo, Chunsheng
    Zhao, Di
    Zhang, Shiwei
    Pan, Shijie
    Zhu, Hui
    Feng, Shiwei
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2023, 13 (12): : 1914 - 1922
  • [40] TEMPERATURE DISTRIBUTION AND SAFE OPERATING AREA FOR BIPOLAR TRANSISTORS.
    Zeng Qingming
    Pan Tao Ti Hsueh Pao/Chinese Journal of Semiconductors, 1985, 6 (06): : 611 - 619
12345