MODELING AND TEST GENERATION ALGORITHMS FOR MOS CIRCUITS.

被引：20

作者：

Jain, Sunil K. ^{[1
]}

Agrawal, Vishwani D. ^{[1
]}

机构：

[1] AT&T Bell Lab, Murray Hill, NJ,, USA, AT&T Bell Lab, Murray Hill, NJ, USA

来源：

IEEE Transactions on Computers | 1985年 / C-34卷 / 05期

关键词：

D-ALGORITHM - MOS CIRCUIT FAULTS - STUCK FAULTS - TEST GENERATION ALGORITHMS;

D O I：

10.1109/TC.1985.1676582

中图分类号：

学科分类号：

摘要：

引用

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页码：426 / 433

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