共 50 条
- [11] Bus-based COMA - Reducing traffic in shared-bus multiprocessors SECOND INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS, 1996, : 95 - 105
- [12] A scheduling algorithm for bus-based shared memory multiprocessors CCCT 2003 VOL, 2, PROCEEDINGS: COMMUNICATIONS SYSTEMS, TECHNOLOGIES AND APPLICATIONS, 2003, : 1 - 3
- [13] A Low-Power and High-efficiency Cache Design for Embedded Bus-based Symmetric Multiprocessors 2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON), 2013,
- [14] Multiple bus-based hierarchical multiprocessors and their bandwidth analysis 1996 IEEE SECOND INTERNATIONAL CONFERENCE ON ALGORITHMS & ARCHITECTURES FOR PARALLEL PROCESSING, ICA3PP'96, PROCEEDINGS OF, 1996, : 311 - 318
- [15] Achieving high performance in bus-based shared memory multiprocessors IEEE CONCURRENCY, 2000, 8 (03): : 36 - 44
- [16] Leveraging optical technology in future bus-based chip multiprocessors MICRO-39: PROCEEDINGS OF THE 39TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, 2006, : 492 - +
- [17] Functional Self-Testing for Bus-Based Symmetric Multiprocessors 2008 DESIGN, AUTOMATION AND TEST IN EUROPE, VOLS 1-3, 2008, : 1146 - +
- [19] Performance evaluation of the fixed sequential prefetching on a bus-based multiprocessor: Preliminary results SECOND INTERNATIONAL SYMPOSIUM ON PARALLEL ARCHITECTURES, ALGORITHMS, AND NETWORKS (I-SPAN '96), PROCEEDINGS, 1996, : 487 - 493
- [20] An effective bus-based arbiter for processors communication 18TH INTERNATIONAL CONFERENCE ON ADVANCED INFORMATION NETWORKING AND APPLICATIONS, VOL 2 (REGULAR PAPERS), PROCEEDINGS, 2004, : 236 - 240