Fast transient power and noise estimation for VLSI circuits

被引：0
|
作者：
Eisenmann, Wolfgang T. [1 ]
Graeb, Helmut E. [1 ]
机构：
[1] Motorola, Munich, Germany
来源：
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 1994年
关键词：
12;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
引用
收藏
页码：252 / 257
相关论文
共 50 条
  • [11] High-level area and power estimation for VLSI circuits
    Nemani, M
    Najm, FN
    1997 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN - DIGEST OF TECHNICAL PAPERS, 1997, : 114 - 119
  • [12] Nonparametric estimation of average power dissipation in CMOS VLSI circuits
    Yuan, LP
    Teng, CC
    Kang, SM
    PROCEEDINGS OF THE IEEE 1996 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1996, : 225 - 228
  • [13] Basic experimentation on accuracy of power estimation for CMOS VLSI circuits
    Ishihara, T
    Yasuura, H
    1996 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - DIGEST OF TECHNICAL PAPERS, 1996, : 117 - 120
  • [14] High-level area and power estimation for VLSI circuits
    IEEE, Santa Clara, CA 95052, United States
    不详
    不详
    IEEE Trans Comput Aided Des Integr Circuits Syst, 6 (697-713):
  • [15] High-level area and power estimation for VLSI circuits
    Nemani, M
    Najm, FN
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 1999, 18 (06) : 697 - 713
  • [16] Statistical estimation of short-circuit power in VLSI circuits
    Hill, AM
    Kang, SM
    ISCAS 96: 1996 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS - CIRCUITS AND SYSTEMS CONNECTING THE WORLD, VOL 4, 1996, : 105 - 108
  • [17] Experimental analysis of power estimation models of CMOS VLSI circuits
    Ishihara, T
    Yasuura, H
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1997, E80A (03) : 480 - 486
  • [18] Machine Learning Based Power Estimation for CMOS VLSI Circuits
    Govindaraj, V
    Arunadevi, B.
    APPLIED ARTIFICIAL INTELLIGENCE, 2021, 35 (13) : 1043 - 1055
  • [19] Effects of delay models on maximum power estimation of VLSI circuits
    Lu, JM
    Lin, ZG
    2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, 2001, : 179 - 182
  • [20] Timing, power and noise optimization for simultaneous switching in VLSI circuits.
    Shiue, WT
    6TH WORLD MULTICONFERENCE ON SYSTEMICS, CYBERNETICS AND INFORMATICS, VOL XV, PROCEEDINGS: MOBILE/WIRELESS COMPUTING AND COMMUNICATION SYSTEMS III, 2002, : 462 - 465
12345