共 50 条
- [42] 2:1 Multiplexer Based Design for Ternary Logic Circuits 2013 IEEE ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS & ELECTRONICS (PRIMEASIA), 2013, : 46 - 51
- [44] Design of an asynchronous digital system with B-ternary logic 27TH INTERNATIONAL SYMPOSIUM ON MULTIPLE-VALUED LOGIC - 1997 PROCEEDINGS, 1997, : 265 - 271
- [45] An Efficient Design Methodology for CNFET based Ternary Logic Circuits PROCEEDINGS OF 2016 IEEE INTERNATIONAL SYMPOSIUM ON NANOELECTRONIC AND INFORMATION SYSTEMS (INIS), 2016, : 278 - 283
- [46] A Novel CNTFET-Based Ternary Logic Gate Design 2009 52ND IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2009, : 435 - 438