Study on leakage power estimation and reduction methodology of CMOS circuit

被引：0
|
作者：
Chen, Zhi-Qiang [1 ]
Wu, Xiao-Bo [1 ]
Yan, Xiao-Lang [1 ]
机构：
[1] Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China
来源：
Zhejiang Daxue Xuebao (Gongxue Ban)/Journal of Zhejiang University (Engineering Science) | 2006年 / 40卷 / 05期
关键词：
D O I：
10.1111/j.1525-1438.2006.00385.x
中图分类号：
学科分类号：
摘要：
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页码：772 / 776
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